Power Aware System Refinement

Power aware data type refinement on the HIPERLAN/2

This paper considers a domain specific methodology that has been employed to derive a cost optimized on-chip memory architecture for network protocols such as the Data Link Control layer of the HIPERLAN/2 protocol. The performed design flow was based on a well established methodology script which is appropriate for network protocol applications. The methodology consists of a sequence of steps t...

Power Iterated Color Refinement

Color refinement is a basic algorithmic routine for graph isomorphism testing and has recently been used for computing graph kernels as well as for lifting belief propagation and linear programming. So far, color refinement has been treated as a combinatorial problem. Instead, we treat it as a nonlinear continuous optimization problem and prove that it implements a conditional gradient optimize...

Power- Aware Computing Power Tradeoffs

sumption in active mode as a tradeoff to increased performance, but any power consumed when the system is idle is a complete waste and ideally should be avoided by turning the system off. A typical current system is so complex that parts of it will likely be inactive even during active periods, and they can be turned off to reduce power with no impact on performance. The introduction of finer-g...

A Power Aware Cache and Register File Design Space Exploration

Refinement-Aware Generation of Attack Trees

Attack trees allow a security analyst to obtain an overview of the potential vulnerabilities of a system. Due to their refinement structure, attack trees support the analyst in understanding the system vulnerabilities at various levels of abstraction. However, contrary to manually synthesized attack trees, automatically generated attack trees are often not refinement-aware, making subsequent hu...